1. Field of the Invention
The present invention relates to bus control signal routing and termination in computers to improve signal integrity.
2. Description of the Related Art
A computer system uses a bus to enable its central processing unit (CPU) to communicate to various input/output (I/O) devices. The bus system may include multiple bus connectors which are usually aligned side by side forming a row of connectors. Each connector is capable of receiving compatible expansion boards which are plugged into the bus. A computer system usually includes a bus controller, or a bus driver, which interfaces the CPU to the bus and controls bus activities.
The extended industry standard architecture (EISA) is a high performance bus which extends the capabilities of the industry standard architecture (ISA) while still remaining compatible with the ISA architecture. EISA was developed to exploit the capabilities of the 80386 and 80486 microprocessors manufactured by the Intel Corporation and other high performance devices becoming available. The EISA bus system may include up to 8 bus connectors. A computer system using the EISA bus system includes an EISA bus controller (EBC), such as the 82358 EISA bus controller manufactured by the Intel Corporation, which interfaces the CPU to the EISA bus.
The bus usually includes multiple signals including address, data and control signals. Each bus connector includes a terminal for each of these signals, and these terminals are connected together through conductor wires, or traces, routed on the computer system board. The control signals are usually driven by the bus controller or by any other bus master located on an expansion board connected to the bus. Some of these control signals are edge-sensitive, wherein the important event is the rising or falling edge of the signal, rather than the signal level. Other expansion boards commonly referred to as slave boards, or bus masters operating in a slave mode, are connected to the bus and read the control signals by detecting the rising or falling edges of the signals. Significant levels of noise on these edges may lead to detection of false signals, which ultimately may interfere with the operations and reliability of the computer system.
The rising or falling edge may cause transmission line reflections on the trace for a given control signal. These reflections do not pose a significant problem if the control signal transitions are relatively slow. If the transitions are slow, the transition wave length is relatively long compared to the length of the trace, allowing the reflections to settle relatively quickly such that the resulting noise created by the reflections is insignificant. However, modern electrical components are capable of transitions of 1 to 2 nanoseconds or less, such that the signal wavelengths approach the same length as the traces on a typical computer system board. Transmission line reflections have become a significant factor as the transition times have decreased since the traces are randomly routed and are generally not properly terminated. The noise generated by the reflections causes the transition appearing on the trace to bounce one or more times before stabilizing, which may create undesirable false signal transitions.
The bus drivers, such as the EBC specifically designed for the EISA bus, are designed to drive a certain amount of load capacitance. Each expansion board adds a certain amount of load capacitance to the bus, making it more difficult for the bus driver to properly drive the control signals within a specified amount of time. The expansion board load capacitance also changes the impedance of the bus. The characteristic impedance, Z.sub.O, of an unloaded bus is defined by: ##EQU1## where L.sub.O is the intrinsic inductance of each bus trace measured in Henries/inch, and C.sub.O is the intrinsic capacitance measured in Farads/inch. Z.sub.O is measured in ohms and might range between 15 and 200 ohms. The characteristic impedance for the EISA bus is typically 50 ohms. An expansion board adds a lumped capacitance on the bus at the connector where it is plugged in. If 8 expansion boards are plugged into the bus and each connector is 0.8 inch apart, then the new impedance, Z.sub.O ', of the bus is: ##EQU2## where C.sub.D is referred to as the distributive load capacitance per expansion board and is equal to the total capacitance of the lumped loads in Farads, divided by the length of the signal traces between the bus connector and the drivers and receivers on the expansion boards, in inches. As more expansion boards are plugged into a bus of a given length, the distributive capacitance, C.sub.D, increases, which causes the impedance of the bus, Z.sub.O ', to decrease. The calculation of Z.sub.O ' will vary depending upon the capacitance per expansion board and the length of the traces between each board.
The EISA specification designates that the length of the signal traces between the bus connector and the drivers and receivers on expansion boards should be limited to 2.5 inches, and that the maximum allowable loading capacitance per expansion board should be 20 pF, including wiring capacitance and the total load capacitance. Even if every expansion board manufacturer followed the specification, a system with 8 expansion boards plugged into the EISA bus may cause the bus impedance to drop to 15 ohms or less. The primary significance of the decrease in the bus impedance is that it causes an impedance mismatch between the bus driver, such as the EBC, and the bus, as well as changes along the bus transmission line such that the impedance is not uniform along the bus transmission line. The result of this impedance mismatch is an increase in the amount of transmission line reflections appearing on the bus.
In addition to the various boards which can be added via the bus connectors, various components located on the system board, referred to as system loads, are connected to the bus and the bus driver, adding capacitance and loading. The system board loads generally do not add as much load as a fully loaded bus. For example, if the system loads were wired together with traces on the mother board, the total impedance of the system load traces as loaded by the system loads would not match the impedance of the bus. When the system load traces are connected to the bus traces, an impedance mismatch occurs such that reflections from the system loads interfere with and create undesirable noise on the bus.
Prior to the present invention, the signal board traces were generally randomly routed by an auto-router having little or no routing specifications. The primary goal was to connect each node efficiently with as short a trace as possible, with little concern for the resulting trace pattern. Occasionally, overrides were specified for particularly sensitive components, such as clock oscillation circuits, but the random routing was utilized in most other portions. This random routing method led to an array of disordered traces with multiple transmission lines on each node.
In an EISA bus system, for example, a trace might have been routed from the EBC to a system load, and then fanned out from that load to every other system load including the EISA bus itself. Each fanned out trace forms a transmission line without proper termination, causing multiple reflections for each signal transition. In that case, the impedance mismatch between the system loads and the EISA bus would cause reflections generated by the system loads to further interfere with the signals on the bus. Alternatively, a trace might have included one or more T connections, wherein each T connection formed multiple transmission lines between the system loads, causing the same problem. The combination of random node connections and a significant amount of load on the bus caused a substantial and undesirable level of transmission line reflections, which further caused the slave expansion boards to detect at least one false transition. These false transitions severely compromised system operations and reliability, eventually resulting in system failure.
In addition, certain components that can be used on expansion boards to be plugged into the bus are sensitive to significant control signal undershoot. Undershoot occurs when a bus driver sinks enough current during a high to low transition to pull the signal voltage below electrical ground. When the undershoot causes the voltage signal to fall 2 volts or more below ground, sensitive components are damaged, especially if significant undershoot occurs frequently.